SEMICON China - Keynote & Invited Speakers

Keynote & Invited Speakers(2023)

	Spintronics for Greener Digital Technologies and Prospects Far Beyond Prof. Albert Fert, Nobel Laureate in 2007	Innovations Boost Integrated Circuit Prof. Ming Liu, Academician of CAS, Fudan University

	Advanced Packaging Technology Challenges: an Equipment Supplier's Perspective Dr. Yang Pan, Corporate Vice President, Lam Research	Endless Technological Innovation in IC Equipment Mr. Jinrong Zhao, Chairman of the Executive Committee, Beijing NAURA Technology Group

	From Legacy to Leading Edge: Broadband Wafer Optical Inspection for Process Control Dr. Yalin Xiong, Senior Vice President and General Manager, KLA Corporation

Partial List of Confirmed Distinguished CSTIC 2023 Invited Speakers

	Functional Circuits Based on 2D Semiconductors Wenzhong Bao, Fudan University	Bioinspired in-sensor computing for artificial vision Yang Chai, HK Polytechnique University

	Architectures and Chips of "Sensing with Computing" for Intelligent Continuous Perception Fei Qiao, Tsinghua University	Memristor-based Reservoir Computing Zhongrui Wang, University of Hong Kong

	High Performance Electronic Devices Based on Novel Materials for Logic and Memory Applications Yanqing Wu, Peking University	Low Temperature Ge CMOS for Future M3D Technology Heng Wu, Peking University

	In-Memory Computing for Machine Intelligence Bonan Yan, Peking University	2D NEMS and 2D Electronics for Energy-Efficient Sensing and Computing Rui Yang, University of Michigan-Shanghai Jiao Tong University Joint Institute

	Low Carbon Chips for Emerging Zeta-scale Computing Hao Yu, Southern University of Science and Technology	High Density Integrated Intrinsically Stretchable Electronics Yuqing Zheng, Peking University

	Hybrid 2D/CMOS Microchips for Memristive Applications Mario Lanza, King Abdullah University of Science and Technology (KAUST)

	CycleGan-based mask diffraction model Yijiang Shen, Guangdong University of Technology	From micro to nano, and beyond, --- Measuring Innovations --- Zhigang Wang, Hitachi High-Tech Corporation

	DUV Mask Writer addressable to 90nm nodes with a Sustainability Profile Youngjin Park, Mycronic Co. Ltd.	Recent progress of EUV resist development for improving Chemical Stochastic TORU FUJIMORI, FUJIFILM Corporation

	The Possibility of Using 193 nm Immersion Lithography Process for 5 nm Logic Design Rules Qiang Wu, Fudan University, NICIC	An ocean of opportunities in a fast growing market using ASML TWINSCAN systems Henri van Helleputte, ASML Netherlands B.V.

	Challenges of the advanced lithography for the next decade Yasin Ekinci, Paul Scherrer Institute	Lithography Material Challenge Allen Chang, JSR

	Co-advancing Scaling Techniques and Functionality Enhanced Potential Device Infrastructures David Xiao	AMEC Etch product innovation for advanced technology and MtM applications Wuping Liu, AMEC

	Ion Beam Etching as a Patterning Solution for AR/VR Applications Yuxin Yang, Leuven Instruments	Integration and Pixelation of Colloidal Quantum Dot layers at Wafer Level for Image Sensor Applications Yunlong Li, Zhejiang University

	Atomic Scale Engineering: An outlook of ALD Applications and Localization Weimin Li, Jiangsu Leadmicro Nano-Equipment Technology Ltd.

	Cell structure and process integration of a novel 2T0C technology for high-density DRAM application Zhengyong Zhu, Beijing Superstring Academy of Memory Technology	Study of Slip Defects and Improving Methods in Furnace High Temperature Process Yan Sun, Beijing NAURA Microelectronics Equipment Co., Ltd

	Technical challenges in MRAM fabrication Guchang Han, Zhejiang Hikstor Technology Co., Ltd	Chemical mechanical polishing of cobalt with reduced copper/cobalt galvanic corrosion in alkaline slurry Chuanyun Wan, Shanghai Institute of Technology

	Improving 300mm Si wafer planarization process with a wholistic approach Weimin Li, Shanghai Institute of IC Materials	CMP Pads---Grooves and Performances Hongqi Xiang, InvenTech Materials

	The Challenge and Solution for Advanced Node Post Cu CMP Cleaning Bing Liu, Anji Microelectronics Technology(Shanghai) Co., Ltd	Research progress and challenges of chemical mechanical polishing technology of silicon carbide wafer Lijuan Zhang, Shanghai Xin Qian Semiconductor Co. Ltd

	Research on Surface Planarization Technology for Silicon Wafers Weili Liu, Shanghai Institute of Microsystem and Information Technology	Some Methods to Reduce Tiny Scratch Defect for Via Contact Tungsten Chemical Mechanical Planarization Process Le Ning, Semiconductor Manufacturing North China (Beijing) Corporation (SMNC)

	Ultra-high-throughput inline probe metrology and inspection Lei Feng, Infinitesima Ltd.	Build-in Fault-Tolerant Computing Against Silent Data Corruptions Huawei Li, Institute of Computing Technology, Chinese Academy of Sciences

	Power-Aware Testing for Low-Power VLSI Circuits Xiaoqing Wen, Kyushu Institute of Technology

	Development of 3D Embedding Glass Wafer Fan-Out Technology Daquan Yu, Xiamen University	Processing Innovations to Address the Manufacturing Challenges of Heterogeneous Integration Len Tedeschi, Applied Materials

	Broadband Graphene-Silicon Integrated Field-Effect Coupled Detectors Yang Xu, Zhejiang University	Memristor-based Reservoir Computing System for Fully Analog Temporal Signal Processing Yanan Zhong, Suzhou University

	Accurate in-memory computing with MRAM device variation-aware adaptive quantization Qiming Shao, the Hong Kong University of Science and Technology	Micromachined Ultrasonic Transducers (MUT) Based on MEMS Technology Yipeng Lu, Peking University

	RRAM-based computation in memory for deep neural networks Peng Huang, Peking University	Photonic Integrated Circuits using Transparent Conductive Oxides: from Materials and Devices to System Integration Alan Wang, Baylor University

	Achieving the ultimate sensitivity of silicon nano transistor based ion sensors Zhen Zhang, Uppsala University	Universal integration strategy from emerging layered semiconductor to multi-mode devices Chen Wang, Tsinghua University

	Design Tools for Adiabatic Quantum-Flux-Parametron Logic: Toward Extremely Energy-Efficient Computing Tsung-Yi Ho, Chinese University of Hong Kong	CorrectNet: Robustness Enhancement of Analog In-Memory Computing for Neural Networks by Error Suppression and Compensation Li Zhang, Technical University of Darmstadt

	Co-Design of Binarized Deep Learning Zhiru Zhang, Cornell University	Real-time Scheduling of Hard Deadline Tasks on a Heterogeneous Architecture An Zou, Shanghai Jiao Tong University

	Agile Sign-Off for Sub-Nanometer VLSI Designs in the Post-Moore Era Cheng Zhuo, Zhejiang University	Efficient Deep Learning Accelerators Based on Multimodal Model Compression Jun Lin, Nanjing University

	Integrated System Design for Neural Radiance Field Rendering Xin Lou, ShanghaiTechUniversity	AI and GPU accelerated large-scale transistor-level nonlinear circuit simulation Zhou Jin, China University of Petroleum-Beijing

	Break the Memory Wall: Cross-Layer Co-Design for Energy Efficient Machine Learning SoCs Chixiao Chen, Fudan University	Learning Based Electromigration Induced Stress Evolution Analysis for Multi-segment Interconnect Wires Haibao Chen, Shanghai Jiao Tong University

	Efficient Multi-Modal AI Acceleration Meng Li, Peking University	Ultra-Fast FPGA Acceleration of Graph Cut Algorithms Yajun Ha, ShanghaiTech University

	STT-MRAM Computing-in-Memory Macro with a Refined Bit-Cell for AI Inference Hao Cai, Southeast University	Compute-in-ROM: How to Achieve Both High Density and High Flexibility? Xueqing Li, Tsinghua University

	Logic synthesis and some of its challenges Yong Xiao, Giga Design Automation Co., Ltd.	Essential Steps to Analyze Effective Resistance of ESD Paths-PG Routing Network Pruning and Resistance Contribution by Layer Frank Feng, Synopsys Inc.