(** to designate keynote talk, * to designate invite talk)
Sunday, March 12, 2017 Shanghai International Convention Center
Joint Session: Symposium II and Symposium III-Lithography/Etch joint session
Meeting Room：3rd Floor Yellow River Hall 黄河厅
Session Chairs: Kafai Lai/Ying Zhang
| 13:30-13:35 | Opening Remarks |
| Kafai Lai, IBM | |
| **13:35-14:05 | The Path Forward: The Future of Optical Lithography |
| Donis Flagello, Nikon Research America | |
| **14:05-14:35 | Patterning Technology Inflections for the 10nm and Beyond Logic Nodes |
| Rich Wise, Lam Research | |
| *14:35-14:55 | Considerations for pattern fidelity control towards 5nm node |
| Hidetami Yaegashi, TEL | |
| *14:55-15:15 | Key points in 14 nm Photolithographic Process Development, Challenges and Process Window Capability |
| Qiang Wu, SMIC | |
| 15:15-15:30 | Coffee Break |
Session II: Advanced Patterning
Meeitng Room:3C+3D
Session Chair: Ying Zhang (AMAT)
| *15:30-16:00 | Advanced technology for sub-10nm Patterning |
| Ken Nawa, TEL, Japan | |
| *16:00-16:30 | Advanced Materials for Plasma Sources |
| Jennifer Sun, Applied Materials, US | |
| *16:30-17:00 | Advanced Plasma Etch technology and Applications |
| Ganming Zhao, Applied Materials, China | |
| Poster Session: | Location: Foyer of Yangtze River Hall |
| Coffee Break | Line edge roughness improvement by plasma treatment in nanoscale etching |
| Hu Zhou, AMEC | |
| LDD BARC Open in FinFET Technology Node | |
| Long-Juan Tang, Semiconductor Manufacturing International Corporation | |
| Cavity Profile Control in DRIE Process | |
| Wang Jing, North Microelectronics CO., Ltd | |
| Effects of N-free DARC and NDC on Low-k Trench Plasma Etch | |
| Jihong Zhang, Lam Research Corporation | |
| Dummy Poly Removal in FinFET Technology Node | |
| Ruixuan Huang, Semiconductor Manufacturing International Corp | |
| The Line Edge Roughness Improvement with Plasma Coating for 193nm Lithography | |
| Erhu Zheng, SMIC | |
| The Study of Deep Trench Etch Process for PCRAM | |
| Yiying Zhang, SMIC | |
| Optimization of 28nm SiGe Sigma Shape Trench Depth Uniformity | |
| Wei Sheng, Shanghai Huali Microelectronics Corporation | |
| Improvement of the Pattern Wiggling Profile by PR treatment Methods | |
| Liu Panpan, SMIC | |
| A Study of AA CD uniformity loading opitimization at 28nm node | |
| Yizheng Zhu, Shanghai Huali Microelectronics Corporation | |
| Corrosion studies of yttrium oxide coating under plasma etching | |
| Je-Boem Song, Korea Reasearch Institue of Standards and Science | |
| Producer Barc open challenges and the baseline set up for FinFET | |
| Song Huang, Applied Materials China | |
| Optimization of Wet Strip after Metal Hard Mask All-in-One Etch for Metal Void Reduction and Yield Improvement | |
| Huanxin Liu, SMIC |
Monday, March 13, 2017 Shanghai International Convention Center
Meeting Room: 3C+3D
Session III: FEOL/MOL Etching
Session Chair: Tom Ni (AMEC)
| 8:30-8:45 | The Study of Poly Gate Etching Profile, Micro Loading and Wiggling for NAND Flash |
| Zhuofan Chen, SMIC | |
| *8:45-9:15 | Advanced SAXP patterning. |
| Efrain A. Sanchez, IMEC | |
| 9:15-9:30 | Study of Poly Etch for Performance Improvement with Alternative Spin-on Materials in FinFET Technology Node |
| Yan Wang, SMIC | |
| 9:30-9:45 | Challenges and Solutions of 28nm Poly Etching |
| Xiangguo Meng, Shanghai Huali Microelectronics Corporation | |
| 9:45-10:00 | Coffee Break |
Session IV: Plasma Source and Wet Etch/Clean
Session Chair: Tom Ni (AMEC)
| *10:00-10:30 | Characters analysis of Pulsed Inductively Coupled Plasma in Advanced Etching Processes |
| Wei Gang, NAURA, China | |
| 10:30-10:45 | A Novel Post High Dose Implant Strip (HDIS) Process with Controlled Crust Removal for 28nm and Below Logic Technology |
| Vijay Vaniapura, Mattson Technology | |
| 10:45-11:00 | Dry plasma cleaning by advanced HDRF technology |
| Yannick Pilloux, PlasmaTherm LCC | |
| 11:00-11:15 | Automated On-line Chemical Monitoring and Control System for Hot Phosphoric Si3N4 and Tungsten (W) Etch in 3D NAND |
| Kia Low, ECI Technology Inc | |
| 11:15-11:30 | Study and solution of 28nm AIOetch seal ring residue issue |
| Haibo Shen, Shanghai Huali Microelectronics Corporation | |
| 11:30-13:00 | Lunch Break |
Session V: BEOL Etching and Memory Etch
Session Chair: Shenjian Liu
| *13:00-13:30 | Challenges in 3D Critical Dielectric Etch Process Developmen |
| Xingcai Su, AMEC | |
| 13:30-13:45 | SiN Removal Process for Poly Damage Control in Memory Flash |
| Jia Ren, SMIC | |
| 13:45-14:00 | A STUDY OF SILICON ETCH PROCESS IN MEMORY PROCESS |
| Chang Rongyao, SMIC | |
| 14:00-14:15 | A non-Bosch etching process for power device application |
| Yanzhi He, AMEC | |
| 14:15-14:30 | Front-side illuminated array etching with Bosch Process for CMOS Image Sensor |
| Hao Tan, AMEC | |
| 14:30-14:45 | A Study of Metal Hard-Mask Etch Process with Double Patterning Scheme |
| Dalin Yao, SMIC | |
| 14:45-15:00 | Coffee Break |
Session VI: ALE and Patterning
Session chair: Jingrong Zhao
| *15:00-15:30 | Atomic Precision Etching using a Low Electron Temperature Plasma |
| Shahid Rouf, Applied Materials, US | |
| *15:30-16:00 | Concurrent Engineering of Atomic Layer Etch Patterning Processes Involving Oxide and Nitride Materials |
| Mingmei Wang, TEL, US | |
| 16:00-16:15 | The Loading Effect Study in Metal Hard-Mask All-In-One Etch with Double Patterning Scheme |
| Kefang Yuan, SMIC | |
| 16:15-16:30 | SaDP Core Etching Performance Comparison for Different CCP Etchers |
| Yibin Song, SMIC | |
| 16:30-16:45 | Investigation of plasma stability based on an ICP etcher with frequency tuning of the RF source power |
| Kui Zhao, AMEC |