• Director Technology in JCET and MISpak Technology Technical VP
• Ten years in work in Semiconductor industries, pioneer in BGA Packaging in the nineties. .
• Established a BGA Substrate company in South Asia in1998.
• Developed with semiconductor companies on several products such as IMB embedded, JMD MLO,
Abstract With the advancement of the internet area, many new electronic products evolved rapidly around the Internet Connectivity and Cloud Computing. The main driver for electronics are the mobile and wearables gadgets, constituting more than 70% of the demand for semiconductor component.
JCET, being one of the world largest OSAT assembly, can provide the most comprehensive packaging solution from wafer bumping, MIS substrate fabrication with IC and SIP Packaging and test. Many IC package used in wearables and IOT sensors electronic products, due to the demand for high reliability, miniaturization, high performance, integration and EMI shielding, they are usually customized right from the beginning at design stage with suitable package platform.
In the Presentation, we provide the overview of the new MIS technology that is a new technology used to fabricate IC package substrate. It can provide following feature:
• Fan-in/Fan-out capability to increase design flexibility and reduce bonding wire.
• Thin package.
• Superior RF and electrical performance
• Superior Power and thermal performance
• Addictive plating capable of fine line width/space
The technology that has been rapidly adopted for IC package applications for ultra-thin, miniature and 3D assembly. Most of the MIS package products can pass the MSL 1 reliability test. We will also touch on more innovative applications for Power Devices, Sensor, RF and PoP SIP Modules.
The following is several MIS packaging type maybe used in the wearable and IOT sensors.
MIS Ultra-thin and miniature Package
The ultra thin and miniature package are huge challenges for China domestic OSTA companies. So far, JCET can do the 0.37mm thickness max package with 0.11mm MIS substrate. At present, we try to reduce the thickness to 0.31mm by reducing the MIS substrate to 0.08mm. The MIS package size distribute from 13*13mm to 0.8*0.8mm, this is beneficial for miniature package.
MIS multilayer package
The capability of multilayer MIS substrate package for high density circuits can contain multi-functional electronic circuits within a small surface area and can achieve light weight and low-profile products with improved electric character. The MIS 2L substrate package product with L/S 20um/20um and thickness 120um can pass MSL 1 and TC test can reach to 2500 cycle at least. The MIS 3L substrate package product with L/S 20um/20um and thickness 120um can pass normal MSL 3. 3D MIS package.
As 3-dimensional connections are introduced into semiconductor chips, dramatic changes are also expected in the MIS technology. JCET can provide 3D MIS package with follow feature: Multiple chip solution, Bump technology on leadframe, 3D stack assembly structure, SMT process and so on. The 3D package can reduce the package size and increase the signal transmission performance.
MIS SIP Module
In order to increase the performance of MIS package, we also touch on SIP module package using this technology. It contains several technologies:
• SMT of passive-inductor and capacitor
• Flip Chip of multi Die
• EMI shielding (conformal, compartment)
• Heat Sink
• POP SIP module
Due to the above feature of MIS platform, we can use it in wearable and IOT sensors field. We believe the MIS technology can be used more and more for the sensor package in the near future. |
