Symposium VII: Advanced Packaging and Process Integration
Symposium Committee
Symposium VII: Advanced Packaging and Process Integration
As conventional dimensional scaling faces physical limits, advanced packaging and process integration have taken center stage in driving performance enhancement and system diversification. This session addresses the critical convergence of heterogeneous integration, advanced interconnects, and co-optimized process flows for next-generation integrated circuits.
We welcome original contributions on 3D/2.5D integration, chiplet , hybrid bonding, TSVs, co-packaged optics (CPO), fan-out packaging, and SiP solutions. The session also emphasizes process integration challenges involving novel materials, thermal and power integrity, and ESD.
Symposium Committee
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Prof. Xing Wu Chair |
East China Normal University |
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Dr. Steve X. Liang Co-Chair |
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Prof. Liyi Li Co-Chair |
Southeast University |
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Dr. Rong Sun Co-Chair |
Institute of Advanced Materials Science and Engineering, Shenzhen Institute of Advanced Technology，Chinese Academy of Sciences |
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Prof. Qidong Wang Co-Chair |
Insitute of Microelectronics |
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Dr. Mark Huang Member |
Shenzhen University, China |
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Prof. Mingliang Huang Member |
Dalian University of Technology, China |
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Prof. Horng-Show (Frank) Koo Member |
University into Taipei University of Marine Technology (TUMT) |
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Dr. Daquan Yu Member |
Xiamen Sky Semiconductor Co., Ltd. |
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Dr. Minghai Wang Member |
CTO of Bonotec Electronic Materials |
Symposium VII: Advanced Packaging and Process Integration
As conventional dimensional scaling faces physical limits, advanced packaging and process integration have taken center stage in driving performance enhancement and system diversification. This session addresses the critical convergence of heterogeneous integration, advanced interconnects, and co-optimized process flows for next-generation integrated circuits.
We welcome original contributions on 3D/2.5D integration, chiplet , hybrid bonding, TSVs, co-packaged optics (CPO), fan-out packaging, and SiP solutions. The session also emphasizes process integration challenges involving novel materials, thermal and power integrity, and ESD.