Symposium Chair: Dr. Xiaoping Shi, NAURA, China


* to designate invite talk - 25 min Sponsored by:  
  to designate regular talk - 20 min

Sunday, March 17, 2024 Shanghai International Convention Center
Meeting Room: 5th Floor Yangtze River Hall


Session I: Device Integration - 1
Session Chair: Xiaoping Shi
13:30-13:35 Opening Remarks
 
*13:35-14:00 Tailoring the deposition and composition of advanced oxide and SiCN films to deliver the highest bonding energy for fusion and hybrid bonding applications
  Zongbin Wang, Applied Materials
*14:00-14:25 A Review in III-Nitride Nanocolumns Growth and Applications
  Enrique Calleja, Universidad Politécnica de Madrid
*14:25-14:50 Advances and Reliability Challenges in Heterogeneous Integration in Chiplet Era: from Solder to Copper to Optical Interconnects
  Zhuo-Jie Wu, HFC Semiconductor
14:50-15:10 Optimization of Deep Trench Isolation on 0.18μm SOI BCD Technology for Automotive Application
  Siti Aisah Mohd Salleh, X-FAB Sarawak Sdn. Bhd.
15:10-15:25 Coffee Break
   

Session II: Device Integration - 2
Session Chair: Chao Zhao
*15:25-15:50 The Progress and Challenges of Large Scale Integration of Silicon Photonics
  Adam Lewis, CUMEC
*15:50-16:15 Do we need 300mm GaN?
  Kai Cheng, Enkris Semiconductor,Inc
*16:15-16:40 Si based GaN HEMTs/System R&D and the perspective of the technological commercialization
  Hongyu Yu, Southen University of Science & Technology
   

Monday, March 18, 2024 Shanghai International Convention Center
Meeting Room: 5th Floor Yangtze River Hall


Session III: ALD Process Development - 1
Session Chair: Jianhua Jv
*08:30-08:55 Thin Film Atomic Layer Deposition and Selective Processes
  Rong Chen, Huazhong University of Science and Technology
*08:55-09:20 A Chemistry Perspective of ALD Precursors' Properties
  Xiabing Lou, Origin Deposition Materials Co., Ltd.
09:20-09:40 Characterizing low-k (SiCON) film with different element composition
  Wenxu Duan, Beijing NAURA Microelectronics Equipment Co., Ltd.
09:40-10:00 ALD of Dielectric Materials: Analysis of Equipment Design and Process Performance Using Detailed Modeling
  Yanlin Mao, Suzhou STR Software Technology Co., Ltd.
10:00-10:20 Coffee Break
   

Session IV: Memory Technology
Session Chair: Jiaxiang Nie
*10:20-10:45 Design Technology Co-optimization for Yield and Reliabulity Enhancement of RRAM Technology Platform
  Zhichao Lv, Reliance Memory
*10:45-11:10 The effect of stress on HfO2-based ferroelectric thin films
  Feng Luo, Nankai University
*11:10-11:35 SiGe/Si Heteroepitaxial Epitaxy and Characterization for CMOS and Vertically Stacked DRAM
  Guilei Wang, Beijing Superstring Academy of Memory Technology
*11:35-12:00 Modeling of Endurance Degradation of Anti-ferroelectric Hf1-xZrxO2 Capacitor
  Yaru Ding, Zhejiang University
12:00-13:30 Lunch Break
   

Session V: Device Integration - 3
Session Chair:
Chenyu Wang
13:30-13:50 The Formation of Air-gaps Isolation Used in Metal/Dielectric Stacking
  Weidu Qin, Beijing Superstring Academy of Memory Technology
13:50-14:10 SMT OPTIMIZATION OF PMOSFET BASED ON MULTI-DEPOSITION AND IN-SITU N2 PLASMA TREATMENT
  Longyue Zheng, Zhejiang University
14:10-14:30 FEA of Thermo-mechanically Induced Crack in IMD
  Colin Chan, X-FAB Sarawak Sdn. Bhd.
14:30-14:50 Backside Deposition of LTO/Poly-Si Sealing Layer by One-step PECVD and Post Annealing
  Junxian Gao, Lam Research
14:50-15:10 Copper Diffusion Improvement by Optimizing TaN and Integration in Power Device
  Xiangyu Zhou, Beijing NAURA Microelectronics Equipment Co., Ltd.
15:10-15:30 A machine learning study to obtain an optimal processing pulsed frequency on reactive pulsed DC sputtering of aluminum nitride films
  Xue-Li Tseng, National Central University
15:30-15:45 Coffee Break 
   

Session VI: Process Development - 1
Session Chair: Xun Gu
15:45-16:05 Full Wafer Combinatorial Deposition with In-situ XPS/UPS Characterizations
  Weimin Li, Shanghai Institute of IC Materials Co., Ltd.
16:05-16:25 Tungsten Surface Roughness Improvement by Single Deposition Process
  Zhengning Gao, Lam Research
16:25-16:45 The Effects of Different Silicon Oxide Substrates on Amorphous Silicon Thin-Film
  Zhengdao Liu, Beijing NAURA Microelectronics Equipment Co., Ltd.
16:45-17:05 A Novel Thin Film Deposition Method by IBD for Asymmetrical Patterns
  Zichao Li, Leuven Instruments
17:05-17:25 Potential confusion in the analysis of the current-voltage characteristics of high-k dielectric on lightly doped p-type silicon MIS capacitors
  Wai Shing Lau, Nanyang Technological University
17:25-17:45 The secret of the leakage current mechanism in some historical device-quality high-k metal-insulator-metal capacitors
  Wai Shing Lau, Nanyang Technological University
   

Poster Session:

Optimizing Si/SiO2 Interface of Planar LDMOS Field-Effect Transistors for Medium-Voltage Power Applications
  Jiaoyang Chen, Huahong Semiconductor (Wuxi) Limited
  Study of HDPCVD Charge Improvement for ILD Process
  Jie Yang, Lam Researchc
  IMPROVED PERFORMANCE OF PMOS BY OPTIMIZING THE EPITAXIAL MORPHOLOGY
  Tao Wang, Shanghai Huali Integrated Circuit Corporation
  Exploring the Effect of Gate Oxide Process on the Electrical Performance of the CMOS Device
  Yongkang Hu, University of Science and Technology of China
  Improving Gate Oxide Uniformity Using Wet-Dry Oxidation
  Lin Tang, School of Micro-Nano Electronics, Zhejiang University
  NiSix Anneal on Producer Pyra
  Heping Du, Applied Materials
  DRAM Bit line Evaluation by using Single Precursor Activate Radical Chemistry (SPARC) Process
  Guanfeng Lu, Lam Research
  W CVD Process Extendibility Development for Challenging Gap Fill
  Shao Rui, Applied Materials
  NBTI Improvement Through Gate Process Optimization
  Ying Ma, Applied Material China
  Excellent Performance of PC XT in Soft-Clean
  Xingluan Long, Applied Materials
  Amorphous Silicon Bump Defect Mechanism Analysis and Improvement Strategy
  Shudi Min, Applied Materials
  Approach of Customized Thickness Profile and Superior Uniformity on SACVD
  Xiang Li, Applied Materials
  HARP STI Wafer Sliding and Pre-heat Improvement by Recipe Optimization
  Yiyu Zhang, Applied Materials
  HARP STI Range Improvement for 28nm HKMG Double Patterning Process
  Zhaojie Sun, Applied Materials
  High Bow wafer Handling Approach on Producer PECVD
  Bin Wang, Applied Materials
  Low Dep Rate Oxide Process Development for Glue Layer
  Congcong Zhao, Applied materials
  Excellent Stability Control for High Throughput DARC Process
  Chao Zheng, Applied Materials
  N-Dosage Non-Uniformity Tuning in Nitride Incorporated Gate Oxide Process
  Eira Yang, Applied Materials
  High Productivity of Advanced Al PVD in Al Slab
  Xiaogang Su, Applied Materials
  SiGe Epitaxy Improved by Si Cap Technology
  Tao Wang, Shanghai Huali Integrated Circuit Corporation
  Effect of process parameters on microstructure and properties of ITO films by pulsed magnetron sputtering
  Yanmeng Chen, Beijing NAURA Microelectronics Equipment Co., Ltd.
  The Influence of Different Parameters on Capacitive Coupled Magnetron Sputtering Process
  Song Yang, Beijing NAURA Microelectronics Equipment Co., Ltd.
  Effect of process gas pipline on TiN film resistance
  Hongwei Geng, Beijing NAURA Microelectronics Equipment Co., Ltd.
  TiN Infilm Particle Improvement by Bias Field Integration
  Xin Wang, Beijing NAURA Microelectronics Equipment Co., Ltd.
  Tool transfer compatibility improvement for different thin wafer type
  Jiaxi Liu, Applied Materials