Barbara has a BS and MS in Electrical Engineering and has been working in the industry for over 20 years. She is the co-founder of FuturePlus Systems, a test and measurements company, that provides accurate and easy to use tools to engineers around the globe. Her specialty is bus architectures, in particular, memory and display technologies. She has served in several industry standard organizations and is a frequent public speaker. Barbara resides in New Hampshire, USA is married and has three children.
Topic & Abstract:
Get it right the first time! How to test for compliance to the LPDDR4 JEDEC Standard.
The Mobile and IoT market will involve manufacturing in high volume where mistakes and recalls can be economically devastating for manufacturers. Low Power DDR4 Memory (LPDDR4) design validation and testing for compliance to the JEDEC LPDDR4 standard is critical to a high volume product success. The low power, high data rates and dynamic clocking of LPDDR4 create test challenges. This paper will outline validation and testing strategies to ensure compliance to the LPDDR4 specification. Also measurements that can ensure that low power and high data rate goals are being met will be demonstrated. |
