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Chinese
2020年6月27-29日
上海新国际博览中心

Symposium IX: Design and Automation of Circuits and Systems


(** to designate keynote talk, * to designate invite talk)

Sunday, March 15, 2020 Shanghai International Convention Center
Meeting Room:3E

Session I: Low-Power Design and EDA
Session Chair: Wenjian Yu

13:30-13:35 Opening Remarks
  Wenjian Yu
**13:35-14:05 Minimum Energy Operation of Voltage-Scaled Circuits
  Hidetoshi Onodera, Kyoto University
*14:05-14:30 Greedy Dynamic Power (GDP): Power Budgeting and Thermal Management of Multi-Core Systems in the Dark Silicon Era
  Hai Wang, University of Electronic Science and Technology of China
14:30-14:45 Power Oriented CMOL Defect-Tolerant Mapping with Available Nanodevices
  Shangluan Xie, Ningbo University
14:45-15:00 Coffee Break
   

Session II: Reliability-Aware IC Design
Session Chair: Haibao Chen

*15:00-15:25 Sign-Off Level Full Chip ESD/Reliability Design Verification In Logical Driven Layout Static Approach
  Frank Feng, Mentor, A Siemens Business
*15:25-15:50 A Reliable Task Deployment Algorithm for Multi-Core Systems — How Asymmetric Aging Can Lead a Way
  Yu-Guang Chen, National Central University
*15:50-16:15 Reliable Design for 3D ICs: From Microarchitecture and Physical Design Perspectives
  Yuanqing Cheng, Beihang University
16:15-16:30 Analysis of ESD Effect and Ionizing Radiation Particles in Gate Oxide
  C.-Z. Chen, EtownIP Microelectronics
16:30-16:45 Statistical Wear Leveling of Phase-Change Memory
  Chengyu Xu, Chien Wang, Jiangsu Advanced Memory Technology Co. Ltd.


Monday, March 16, 2020 Shanghai International Convention Center

Joint Session: Symposium II and Symposium IX-DTCO
Meeting Room: 5th Floor Yangtze River Hall长江厅
Session Chairs: Cheng Zhuo/ George Lu

08:30-08:35 Opening Remarks
  Cheng Zhuo/ George Lu
**08:35-09:05 Monolithic 3D enabled Processing-in-SRAM Memory
  Vijaykrishnan Narayanan, Pennsylvania State University
**09:05-09:35 TBD
  Steffen Schulz, Mentor Graphics
**09:35-10:05 Full Chip Curvilinear ILT in a Day
  Leo Pang, D2S
10:05-10:20 Coffee Break
   

Meeting Room: 3E

Session IV: EDA + AI
Session Chair: Pingqiang Zhou

**10:20-10:50 Optical Networks-on-Chip (ONoCs): EDA Achievements
  Ulf Schlicthmann, Technical University of Munich
*10:50-11:15 Learning-Based Power Modeling and Optimization for FPGA
  Wei Zhang, Hong Kong University of Science and Technology
11:15-11:30 An Artificial Intelligence Based Defects Auto-Classification System in Semiconductor Manufacturing
  Pengfei Wang, Shanghai IC R&D Center
11:30-11:45 A Neural-Network Approach to Better Diagnosis of Defect Pattern in Wafer Bin Map
  Junjun Zhuang, HLMC
11:45-12:00 Perceptron Algorithm and Its Verilog Design
  Wang Kainan, Institute of Information Engineering, CAS
12:00-13:30 Lunch Break
   

Session V: Advanced IC Design
Session Chair: Le Ye


**13:30-14:00 A Clock Jitter Tolerant Σ∆ Modulator Employing A Hybrid Loop Filter in CMOS 40nm Technology
  Jose Silva-Martinez, Texas A&M University
*14:00-14:25 Energy-Efficient Inverter-Based Amplifiers: From fundamentals to the state-of-the-arts
  Youngcheol Chae, Yonsei University
*14:25-14:50 When a SAR ADC Meets its Friends!
  Yan Zhu, University of Macau
14:50-15:05 Towards Optimal Logic Representations for Implication-based Memristive Circuits
  Lin Chen, Ningbo University
15:05-15:20 Timing Violation as Dominant Reason For Failure of Clocked Digital Circuit due to RF Interference in Supply
  Shanshan Nong, School of Electronics and Information Technology, Sun Yat-sen University
15:20-15:35 Coffee Break
   

Session VI: From Physical to System Design
Session Chair: Weikang Qian


**15:35-16:05 A Classification Framework Using Incorrectly Labeled Data for Manufacturing Applications
  Xin Li, Duke University
*16:05-16:30 DREAMPlace 2.0: an Open-Source GPU-Accelerated Global and Detailed Placement for Large-Scale VLSI Designs
  Yibo Lin, Peking University
16:30-16:45 A Novel Cellular Array Design Using Quantum-dot Cellular Automata
  Huiming Tian, Ningbo University
16:45-17:00 A Real-Time Visual Tracking for Unmanned Aerial Vehicles with Dynamic Window
  Jia Zhang, Zhejiang University
17:00-17:15 Scalable Multi-Session TCP Offload Engine for Latency-Sensitive Applications
  Jingbo Gao, Fudan University
   
Poster Session: Location: 5th Floor    
Coffee Break Advanced MOSFET Model Based on Artificial Neural Network
  Jiahao Wei, Fudan University
  A HYBRID DOMAIN FRAMEWORK FOR PREDISTORTER MODELING AND ADAPTIVE DIGITAL PREDISTORTION REALIZATION
  Hairui Wang, Peking University Shenzhen Graduate School
  Thermal Modeling of Monolithic 3D ICs
  Yuanqing Cheng, Beihang University
  A Compiler Design for a Programmable CNN Accelerator
  Jiadong Qian, Fudan University
  An efficient Digital Frequency calibration scheme oriented High Precision Clock Synchronization technology for Time-triggered Ethernet
  Haiying Yuan, Beijing University of Technology
  A 5.5nW Voltage Reference Circuit
  Kaixuan Du, Peking University
  A high linearity readout integrated circuit for uncooled IR detector
  Chang Liu, Nanjing University
  A 2-D CAPACITANCE SOLVER WITH FINITE DIFFERENCE METHOD
  Wenjie Liang, Tsinghua University