Symposium Chair:
| ** | to designate keynote talk - 30 min | |||
| * | to designate invite talk - 25 min |
| to designate regular talk - 15 min | ||||
Monday, March 24, 2025 Shanghai International Convention Center
Meeting Room: 3C+3D
Session I: Advanced CMOS Technologies
Session Chair: Han Li
| **13:00-13:30 | Cryogenic CMOS: A New Era for Power-Saving Computing |
| Qingtai Zhao, Forschungszentrum Jülich | Peter Grünberg Institute | |
| *13:30-13:55 | Flip 3D (F3D): A Dual-sided Integration Technology for Future's Computing Hardware |
| Heng Wu, Peking University | |
| *13:55-14:20 | Heterogeneous 3D CFET with Hybrid Channel Configuration |
| SangHyeon Kim, Korea Advanced Institute of Science and Technology | |
| 14:20-14:35 | Performance Improvement of Monolithic CFET by Backside Enhanced Contact with C-type Source/Drain Contact Technology |
| Jie Xu, Institute of Microelectronics, Chinese Academy of Sciences | |
| 14:35-14:50 | A SiGe Channel Gate-All-Around Transistor Fabricated Using Novel Cyclic Self-Limiting Wet Etching Combined with Si Removal Process |
| Kaimin Feng, Institute of Microelectronics, Chinese Academy of Sciences | |
| 14:50-15:05 | A Novel Load-Si-cut SOI Nanosheets Transistors with Ultrathin SiGe Cladded Si Channel Structure to Suppress Leakage and Enhance Driven Current |
| Longyu Sun, Institute of Microelectronics, Chinese Academy of Sciences | |
| 15:45-17:55 | Poster Session |
Tuesday, March 25, 2025 Shanghai International Convention Center
Meeting Room: 3C+3D
Session II: Memory and Computing I
Session Chair: Qianqian Huang
| *08:30-08:55 | The Intergration of SRAM-based Computing in Memory and DRAM-based Prcessing in Memory by 3D Stacking Techniques for AI Large Model Utilization |
| Hongjie Liu, Shenzhen Reexen Technology Co., Ltd. | |
| *08:55-09:20 | RRAM-based In-memory Computing for Intelligent Applications |
| Zongwei Wang, Peking University | |
| 09:20-09:35 | Uncertainty Quantification on Multiscale Modeling of RRAM devices |
| Ziyan Liao, Sun Yat-sen University | |
| 09:35-09:50 | Performance Evaluation of Spin-Orbit Torque Magnetic Random-Access Memory at 77K |
| Zhongkui Zhang, Truth Memory Corporation | |
| 09:50-10:05 | Uniform, Large-Scale, and Robust PECVD-MoS2 Nanograined Memristors |
| Hyelim Shin, Sungkyunkwan University | |
| 10:05-10:20 | Coffee Break |
Session III: Memory and Computing II
Session Chair: Qianqian Huang
| *10:20-10:45 | Ferroelectric Materials, Devices and Chip Technologies for Enhanced Computational and Storage Capabilities |
| Xiao Yu, Xidian University | |
| *10:45-11:10 | Hafnium-based Ferroelectric Memory and its Neuromorphic Computing Application |
| Lin Chen, Fudan University | |
| 11:10-11:25 | A Novel Ambipolar Ferroelectric Tunnel Finfet based Computing-in-memory for Quantized Neural Networks with high Area- And Energy-Efficiency |
| Runze Han, Peking University | |
| 11:25-11:40 | Z2-FET Memory with Both Flash and DRAM Modes |
| Baitong Tian, Fudan University | |
| 11:40-13:30 | Lunch Break |
Session IV: Alternative Channel Material Devices
Session Chair: Ming He
| *13:30-13:55 | Low-Frequency Noise of Vertical Gate-All-Around IGZO FETs |
| Ying Wu, Huawei Technologies | |
| *13:55-14:20 | Defects Characterization and Their Impact on the Stability of Oxide Semiconductor Devices and 2T0C DRAM Cell |
| Mengwei Si, Shanghai Jiao Tong University | |
| 14:20-14:35 | Electrical Characteristics of IGZO Thin Film Transistors Fabricated by Magnetron Sputtering with Controlled Mean Free Path of Sputtered Particles |
| Kai Chen, Zhejiang University | |
| *14:35-15:00 | Novel Low-Dimensional Material-Based Hot Carrier Transistors |
| Chi Liu, Institute of Microelectronics, Chinese Academy of Sciences | |
| 15:00-15:15 | Coffee Break |
Session V: Emerging Devices and Platforms
Session Chair: Ming He
| *15:15-15:40 | Printable Organic Photodetectors for Spectrally Selective Light Sensing |
| Vincenzo Pecunia, Simon Fraser University, Canada | |
| 15:40-15:55 | Addressing Thermal Challenges in SOI with Silicon-On-Silicon Carbide Heterointegration |
| Junyi Yang, Fudan University | |
| 15:55-16:10 | DC and RF Characteristics of Silicon FETs on 55nm Low Power Platform |
| Gang Wang, GHS Semiconductor | |
| 16:10-16:25 | Extract parameters from CV Curves Using a Machine Learning Method |
| Wenwen Fei, GHS Semiconductor | |
| 16:25-16:40 | Advancing Semiconductor Industry through Atomistic Simulation: A Materials Design Perspective |
| Xiaoli Liu, Materials Design Inc. | |
| Poster Session: | |
| Optimization of the Safe Operation Area in Step-Gate NLDMOS | |
| Pingrui Kang, Zhejiang University | |
| Optimization of the Figure-Of-Merit in Drain-Extended MOS with a Salicide Block Structure | |
| Xiaoyun Huang, Zhejiang University | |
| Optimization of a Novel Integrated Zener Diode with Polysilicon Structure for Gate Protection in 55 nm BCD Technology | |
| Pingrui Kang, Zhejiang University | |
| Influence of Fluorine Implant on 3.3V NMOS Performance | |
| Wu Tian, GHS Semiconductor Co., Ltd. | |
| The SAS Implant Integration Optimization in the Cell Scaling of 4Xnm ETOX NOR Flash | |
| Zhuangzhuang Wang, Hua Hong Semiconductor (Wuxi) Limited | |
| A Novel Solution to Improve Reliability Characteristics of Advanced Node ETOX NOR-flash Memory | |
| Yihang Du, Hua Hong Semiconductor (Wuxi) Limited | |
| The Structural Optimization of LDMOS with Low-Temperature-Oxide Field Plate | |
| Yixian Song, Zhejiang University | |
| Design, Fabrication, and Process Optimization of Low-Voltage Super Junction Trench Gate MOSFET | |
| Hongzhou Lu, University of the Chinese Academy of Sciences | |
| Throughput Enhancement for Dual-Bit/Cell Split-Gate Floating-Gate Flash Memory Cell with Non-Self Aligned Process Technology | |
| Zhang Yintong, HuaHong Grace Semiconductor Manufacturing Corporation | |
| Investigation of the GIDL Current Shift Phenomenon in Symmetrical High-Voltage NMOS Devices On 55 nm Technology | |
| Mingkang Yu, HuaHong Grace Semiconductor Manufacturing Corporation | |
| Investigation and Optimization of Zener Diode in Advanced Process Node | |
| Tian Tian, HuaHong Grace Semiconductor Manufacturing Corporation | |
| An Integrated Solution for Optimizing the IDSAT Performance of 55 nm BCD Devices | |
| Yifeng Xu, HuaHong Grace Semiconductor Manufacturing Corporation | |
| Reducing Leakage Current of MOSFETs by Optimizing the Grain Size of Polysilicon Gate | |
| Zhiyuan Long, HuaHong Grace Semiconductor Manufacturing Corporation | |
| SRAM Device Threshold Voltage Mismatch Investigation and Improvement | |
| Yangen Xie, GHS semiconductor | |
| A Study of Methods to Reduce WPE/STI Effects | |
| Lihong Xiao, Rong Semiconductor (Ningbo) Co., Ltd. | |
| A Study of LDMOS HCI Reliabilities | |
| Lihong Xiao, Rong Semiconductor (Ningbo) Co., Ltd. | |
| Research on Reducing Leakage in 2T SONOS Embedded Flash by Preamorphization Implant | |
| Wenyu Guo, Shanghai Huali Microelectronics Corporation | |
| Study of Breakdown Voltage Optimization in 1100V HVIC NLDMOS Devices | |
| Jian Ma, HuaHong Grace Semiconductor Manufacturing Corporation | |
| GIDL Analysis of Novel 4F2 VCT Architecture using TCAD Simulations | |
| Ling Yi, Beijing Superstring Academy of Memory | |
| Using Double-epi Structure To Solve The Problems Caused By High Process Temperature Requirements | |
| Shangze Wu, HuaHong Grace Semiconductor Manufacturing Corporation | |
| Impact of X-ray Irradiation on Transfer Characteristics of Fin-FeFET Devices | |
| Jiahao Yao, Institute of Microelectronics of the Chinese Academy of Sciences | |
| The Influence of Writing Pulse on Memory Window of Fe-FinFET | |
| Siyuan Liu, Institute of Microelectronics of the Chinese Academy of Sciences | |
| Simulation of the Effect of Parasitic Channel Height on Characteristics of Stacked Silicon-on-Nothing Nanosheet Field-effect Transistors | |
| Lianlian Li, Institute of Microelectronics of the Chinese Academy of Sciences | |
| Investigation of LDMOS Layout Optimization Utilizing Lithography Processes on 55nm Low Power Platform | |
| Gang Wang, GHS Semiconductor | |
| Study On Process Adjustments and APC for Precise Thickness Control of Embedded Semi-Floating Gates | |
| Changfeng Wang, Shanghai Huali Integrated Circuit Corporation | |
| Research on the Application of DED Process in Embedded Semi-Floating Gate | |
| Changfeng Wang, Shanghai Huali Integrated Circuit Corporation | |
| An 80 V P-Type Organic Semiconductor-Based Power Field-Effect Transistor Featuring a Stair Gate Dielectric Structure | |
| Yi Qian, Nanjing University of Posts and Telecommunications | |
| A Novel DNW Isolation Structure for Reducing Device Size | |
| Houping Yang, Shanghai Huali Microelectronics Corporation | |
| Study on Improving Local Mismatch of 0.305μm2 Small Size SRAM | |
| Jingrong Kang, Shanghai Huali Microelectronics Corporation | |
| 3-D Mirror-Bit SONOS Memory Device with a Vertical-Channel Select Gate Transistor | |
| Jingsong Peng, Shanghai HuaHong Grace Semiconductor Manufacturing Corporation | |
| An Accuracy Scalable N-LDMOS Model for Drift Region | |
| Yajie Wang, Shanghai HuaHong Grace Semiconductor Manufacturing Corporation | |
| Time-dependence Dielectric Breakdown of Novel Dopant-Segregated Tunneling Field Effect Transistors Based on Foundry Platform | |
| Jianfeng Hang, Peking University | |
| Study on Improvement of FG Residue in NOR Flash by Etching Back | |
| Jiayu Ma, Shanghai Huali Integrated Circuit Corporation | |
| High-Performance Micro-Ring Resonators with Gradually Varying Thickness | |
| Xianchang Du, Zhejiang University | |
| A Novel 8T TFET-MOSFET Hybrid SRAM Cell for Ultra-Low Power and Computing In-Memory Applications | |
| Yingxi Zhou, Peking University | |
| Flexible Beam Size Control Capability on Medium Current Implanter Accelerate CMOS Performance Improvement | |
| Weilun Zeng, Applied Materials | |
| Improving White Pixel Through the Optimization of Implantation Dose Rate in CIS Device | |
| Jiayi Yang, Applied Materials | |
| Effective Method to Improve Amplifier Constant β Performance for Advanced BCD | |
| Helin Wang, Applied Materials | |
| Device Performance Improvement by SuperScan3 Implant Application | |
| Biao Sun, Applied Materials | |
| Design of Ferroelectric FET-Based Symmetric Computing-in-Memory Array with Simultaneous Weight Gradient Calculation and Weight Update for On-Chip Learning | |
| Yuxin Lin, Peking university | |
| Implant Rs Monitor Recipe Parameters Optimizing with Digital Tool | |
| Kui Shi, Applied Materials | |
| Pinning Layer Implant Optimization for White Pixel Performance Improvement of CIS Device | |
| Qiang Yue, Applied Materials | |
| The Multipole Effective Factors for High Current Implant Resistance Variation by Digital Mode Analysis | |
| Jinsong Lin, Applied Materials | |
| A Method for Evaluating the Impact of Process-Induced Variability Sources on NMOS Threshold Voltage Based on 55nm Low-Power Planar CMOS Technology | |
| Yaoting Wang, Zhejiang University | |
| Source Life Improvement of Carbon Implantation on Trident XP2 | |
| Yiqun Jiang, Applied Materials | |
| How Vertical Angle Effect Implant Performance | |
| Xiangdong Liu, Applied Materials | |
| Hafnium Missing Induced SRAM HTOL Fail in Scaled HKMG Technologies | |
| Lanying Wei, Semiconductor Manufacturing International Corporation | |