(** to designate keynote talk, * to designate invite talk)

Monday, March 18, 2019 Shanghai International Convention Center
Meeting Room:3E

Session I: Perspective and Frontier of EDA
Session Chair: Wenjian Yu

13:30-13:35 Opening Remarks
  Wenjian Yu
**13:35-14:05 DTCO is the New Moore's Law for Advanced Logic and Memory
  Victor Moroz, Synopsys Inc.
**14:05-14:35 The Life of SPICE as A Transient Circuit Simulator
  Chung-Kuan Cheng, UC San Diego
*14:35-14:55 Accelerate Analog Circuit Simulation
  Senhua Dong, Huada Emprean Inc.
14:55-15:10 Efficient Energy Delivery and Dynamic Control for SoC High Power Supply
  Boping Wu, Huawei Hisilicon Technologies
15:10-15:25 6T&6TPPNN Cell Legalization Considering Complex Minimum Width Constraint
  Peng Yang, Yuhang Chen, Jianli Chen, Fuzhou University
  Hanbin Zhou, Senhua Dong, Empyrean Software Inc.
15:25-15:40 Clock Skew Optimization for Voltage Variation
  Chung Han Chou, Feng Chia University
  Yuan Chao Hsiao, Shih-Chieh Chang, National Tsing Hua University
15:40-15:55 Coffee Break

Session II: The Design of AI Chips
Session Chair: Cheng Zhuo

*15:55-16:15 Dadu - Processor Design for Robot
  Yinhe Han, Chinese Academy of Science
*16:15-16:35 AI Vision Processor for the Automotive - from Horizon
  Davids Wu, Horizon Robotics
*16:35-16:55 Computing-in-Memory for Binary Neural Networks
  Shimeng Yu, Georgia Institute of Technology
16:55-17:10 An Analog Time-Domain Computing Architecture and Circuit Model for One-Hidden-Layer CNN
  Bo Wang, Jiangtao Gu, Chao Zhang, Peking University

Tuesday, March 19, 2019 Shanghai International Convention Center
Meeting Room: 3E

Session III: Frontiers of Design Automation
Session Chair: Weikang Qian

**8:30-9:00 Design Automation of Digital Microfluidic Biochips
  Krishnendu Chakrabarty, Duke University
*9:00-9:25 Not Your Father's Timing Anymore – Novel Approaches to Timing of Digital Circuits
  Ulf Schlichtmann, Technical University of Munich
*9:25-9:50 Nanometer Analog Circuit Synthesis by Multi-objective Bayesian Optimization
  Xuan Zeng, Fudan University
9:50-10:05 A Low-Computational Complexity System for EEG Signal Compression and Classification
  Qinming Zhang, Jia Zhang, Cheng Zhuo, Zhejiang University
10:05-10:20 An Initial Detailed Routing Algorithm Considering Advanced Technology Nodes
  Xiqiong Bai, Dixiu Xiao, Wenxing Zhu, Jianli Chen, Fuzhou University
10:20-10:30 Coffee Break

Joint Session: Symposium II, Symposium VIII and Symposium IX-AI
Meeting Room: 5th Floor Yangtze River Hall
Session Chairs: Qinghuang Lin & Wenjian Yu

**10:30-11:00 How to Successfully Overcome Inflection Points by Using the Technology Roadmap Methodology
  Dr. Paolo Gargini, Chair, IRSD Roadmap, USA
**11:00-11:30 Edge Computing 
for Intelligent Healthcare
  Prof. Sharon Hu, University of Notre Dame, USA
**11:30-12:00 Advances in IC Mask Synthesis and Tape Out Operations in the era of Machine Learning
  Steffen Schulz, Mentor
12:00-13:30 Lunch Break

Meeting Room: 3E
Session V: FPGA and Circuit Design
Session Chair: Chuan Zhang

*13:30-13:55 Overview of A FPGA-based Overlay Processor
  Prof. Lei He, UC Los Angeles
*13:55-14:20 A 1μw-to-100μw Output Range Boost DC-DC with Pseudo Open Loop Structure and Power Efficient Ring Oscillator for Wireless Energy Harvesting
  Prof. Le Ye, Peking university
14:20-14:35 A Fast Transient Response Slope-Adjusted Voltage Mode Buck Converter
  Xu Yang, Wanyuan Qu, Donglie Gu, Haixiao Cao, Zhiyuan Tang, Jianxiong Xi, Lenian He, Zhejiang University
  Shuo Dong, Shanghai Academy of Spaceflight Technology
14:35-14:50 Efficient FPGA Emulation of Quantum Fourier Transform
  Yu Qian, Mingyu Wang, Jialin Chen, Lingli Wang, Fudan University
  Zhihua Feng, Beijing Institute of Computer Technology and Application
14:50-15:05 A Low Power 0.4-1 GHz Receiver Front-End with an Enhanced Third-Order-Harmonic-Rejecting Series N-path Filter
  Zexue Liu, Heyi Li, Yi Tan, Haoyun Jiang, Junhua Liu, Huailin Liao, Peking University
15:05-15:20 Quality Factors of Ionizing Radiation in CMOS Transistor Gates

C.-Z. Chen, Y. Sun, University of Chinese Academy of Science, EtownIP Microelectronics

David Y. Hu, MetroSilicon Microsystems

Hanming Wu, EtownIP Microelectronics
15:20-15:35 Coffee Break

Session VI: Emerging Technologies and EDA
Session Chair: Pingqiang Zhou

*15:35-16:00 Design, Implementation and Integration for Smart Headlights
  Xin Li, Duke University
16:00-16:15 Effective Activating Compensation Logic for DRAMs in 3D-ICs
  Dingcheng Jia, Pingqiang Zhou, ShanghaiTech University
16:15-16:30 Inversions Optimization in XOR-Majority Graphs with an Application to QCA
  Lei Shi, Zhufei Chu, Ningbo University
16:30-16:45 Area-Power-Delay Trade-off in Ternary FPRM Circuits Based on MOTLBO Algorithm
  Mingbo Wang, Qiang Fu, Huihong Zhang, Ningbo University
  Pengjun Wang, Ningbo University, Wenzhou University
16:45-17:00 Advanced 3D Design Technology Co-Optimization for Manufacturability

Yu De Chen, Jacky Huang, Dalong Zhao, Daebin Yim, Joseph Ervin, Coventor Inc., a Lam Research Company
17:00-17:15 A Sequential Shift Write Scheme for Serial EEPROM Compatible with Phase Change Memory
  Jui-Jen Wu, Fan-Yi Jien, Sheng-Tsai Huang, Eric Tsou, Ostr Lin, Jacky Lee, Jiangsu Advanced Memory Semiconductor Corp., Alto Memory Technology Corp.(AMT)
  Junhua Zheng, Peter Xu, Mingliang Liao, Frank Gao, Siyu Nie, Chuancong Xiao, Gangpeng Zhang, Jiangsu Advanced Memory Semiconductor Corp.
Poster Session: Location: 5th Floor    
Coffee Break A MMIC Ultra-Low Noise Amplifier for S-Band Application
  Yu-Chen Wang, Peking Uninversity, Highfii Electronic Technology
  Jiang-Tao Sun, Highfii Electronic Technology
  Gao-Peng Chen, Etra Semiconductor
  Dun-Shan Yu, Peking University
  A 32-Kb High-speed 8T SRAM with Fine-grained Bitline Stacking for Leakage Reduction in 7nm Technology
  Fei Zhou, Guoxing Wang, Shanghai Jiao Tong University
  A Compact SPAD Pixel With Active Quenching and Recharging
  Jiyuan Lu, Bin Li, Nanjing University of Posts and Telecommunications
  Feng Yuan, Yue Xu, Nanjing University of Posts and Telecommunications, National and Local Joint Engineering Laboratory of RF Integration and Micro-Assembly Technology
  A Novel Compact Time-to-Amplitude Converter for SPAD Detector
  Zhong Wu, Ding Li, Nanjing University of Posts And Telecommunications
  Feng Yuan, Xinchun Ji, Yue Xu, Nanjing University of Posts And Telecommunications, National and Local Joint Engineering Laboratory of RF integration & Micro-Assembly Technology
  A Novel Pseudo-Random Scan Method for Silicon-Based Microdisplay
  Wendong Chen, Yuan Ji, Feng Ran, Shanghai University, School of Mechatronic Engineering and Automation
  Chunyan Zhang, Tingzhou Mu, Shanghai University
  A W-band LNA for Passive Millimeter Wave Imaging Application
  Chenxi Liu, Qiannan Ren, Fei Yang, State Key Laboratory of Millimeter Waves, Southeast University
  An Orthogonal Obfuscation Method on Extend Instruction Sets for Security RISC-V Circuit
  Jiawei Wang, Zhicun Luan, Liwei Li, NingBo University
  Yuejun Zhang, NingBo University, State Key Laboratory of Cryptology
  Pengjun Wang, NingBo University, Wenzhou University
  Influence of SiGe on Parasitic Parameters in PMOS
  Bingqi Sun, Chen Wang, QingQing Sun, David Zhang, Fudan University
  YuDe Chen, Jacky Huang, Coventor Inc., a Lam Research Company
  A General DTC Nonlinearity Calculation Method for the ADPLL Spur Analysis
  Xiaoqi Lin, Kanglin Xiao, Bo Wang, Peking University
  Binary Convolutional Neural Network for Brain Computer Interfaces
  Shiqi Zhao, Xiaoxin Cui, Yuanning Fan, Chenglong Zou, Dunshan Yu, Peking University
  Hierarchical Quadruplet Net for Deep Metric Learning and Network Regularization
  Su Zheng, Wenqi Tang, Zicheng He, Jialin Chen, Lingli Wang, Xuegong Zhou, Fudan University
  Zhi-Hua Feng, Beijing Institute of Computer Technology and Application
  High-Resolution High-Sensitivity Human-Computer Algorithm and Gesture Control SOC Chip for Artificial Intelligence Applications
  Chen Li, Tao Zhou, Jianxin Wen, Yuhang Zhao, Shanghai Integrated Circuits R&D Center Co., Ltd.
  NBTI-aware Digital LDO Design for Edge Devices in IoT Systems
  Yu-Guang Chen, Yu-Yi Lin, Yuan Ze University
  A Low Power Analog Baseband for IoT Applications in 40 nm CMOS
  Yi Tan, Zexue Liu, Junhua Liu, Huailin Liao, Peking University