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Chinese
2018年3月14-16日
上海新国际博览中心

中国国际半导体技术大会(CSTIC)

 



 

 

 

       

 

 

 

     

 

 
中国国际半导体技术大会(CSTIC) 2018

China Semiconductor Technology International Conference (CSTIC) 2018


Plan now to participate at CSTIC 2018, one of the largest and the most comprehensive annual semiconductor technology conferences in China and Asia since 2000. Organized by SEMI, IMEC and IEEE-EDS, co-organized by IMECAS. CSTIC 2018 will be held March 11-12, 2018 in Shanghai, China, in conjunction with SEMICON China 2018. The conference will have nine symposiums cover all aspects of semiconductor technology with focus on manufacturing and advanced technology, including detail manufacturing processes, devices design, integration, materials, and equipment, as well as emerging semiconductor technologies, circuit design, and silicon material applications. Hot topics, such as memory technology, 3D integration, MEMS Technology will also be addressed in the conference.

**Full length manuscripts of accepted papers will be considered for publication in IEEE Xplore.

Date and Venue

March 11-12, 2018
Shanghai International Convention Center
上海国际会议中心 中国上海浦东滨江大道2727号
No.2727 Riverside Avenue Pudong, Shanghai 200120, China

 

Distinguished Conference Keynote Speakers

   
PR (Chidi) Chidambaram Dr. Simon M. Sze    
Vice President, QCT Process Technologies & Foundry Engineering, Qualcomm, Incorporated Honorary Chair Professor of NCTU    

 

Conference Chairman


Dr. Ru Huang
Chair
Peking University, China 

   

Organizer:  

Co-organizer:  

Co-sponsor:



 

Proceedings Publication:  


Partial list of other confirmed distinguished CSTIC 2018 invited speakers

III-V GaAs and InP HBT device for 4G & 5G wireless applications
Colombo R. Bolognesi, Prof., Eidgenössische Technische Hochschule Zürich
Advanced CMOS technology
Kangguo Cheng, IBM
Negative capacitance: principle, practice, and limitation
Cheol Seong Hwang, Prof.,Seoul National University
Emerging Three-dimensional Memory Technologies
Yoon Kim, Prof., Pusan National University
Device and Process Technologies for Extending Moore’s Law
Sangwan Kim, Prof., Ajou University
Innovative graphene-based remote epitaxy & layer transfer-EPI growth & Device Applications
Jeehwan Kim, Prof., Massachusetts Institute of Technology
Investigation of Hysteresis Phenomena in 3-D NAND Flash Memory Cells Using Pulse Measurement
Jong-Ho Lee, Prof., Seoul National University
Nonvolatile Memory Outlook: Technology driven or Application driven
Jing Li, University of Wisconsin-Madison
Advanced CMOS technology
Hitoshi Wakabayashi, Titech
FEOL Reliability in Advanced FinFET Technologies
Miaomiao Wang, IBM
Engineering Resistive Switching Behavoir In TAOX Based Memristive Devices For Non-VON Neuman Computing Applications
Yuchao Yang, Peking University
Memristive devices for computing
Joshua Yang, Prof., University of Massachusetts
Desirable material selection on Self-aligned Multi-patterning
Hidetami Yaegashi, Manager, TEL
Machine Learning for Computational Lithography
Yu Cao, CEO, ASML-Brion
Sketch and Peel Lithography for Multiscale Patterning
Huigao Duan, Hunan University
Resist Model Setup for Negative Tone Development at 14nm Node
Lijun Zhao, Process Engineer, Institute of Microelectronics of Chinese Academy of Sciences
High Power LPP-EUV Source with Long Collector Mirror Lifetime for High Volume Semiconductor Manufacturing
Hakaru Mizoguchi, Gigaphoton Inc.
Technical issues of scanner used in packaging
Huang Dongliang, SMEE
Advanced resist/ monomer development in China
Yusong Sun, Hantop
Lithography simulations for flat panel display manufacturing
Thomas Muelder, Synopsys
Machine Learning for Lithography and Physical Design
David Pan, Prof., University of Texas at Austin
Patterning challenges and opportunities for Advanced Memory Technology
Dr. Gill Lee, PPG CTO, AMAT
Memory Patterning Roadmaps
Dr. Siva Kanakasabapathy, Lam Research
Patterning for beyond 14nm nodes
Dr. Lei Zhong, GF Account Technology Director, AMAT
Patterning Roadmap
Dr. Wish Rise, Patterning Managing Director, LAM
Advanced Etch Technology for Patterning 14nm and beyond
Dr. Ying Huang, Applied Materials China
SAQP and SAOP for 5nm nodes and beyond
Dr. Efrain Altamirano Sanchez, IMEC
Patterning Technology Options for Future Scaling
Oyama, TEL
Atomic Layer Etch Modeling for Advanced Patterning
Masanobu Honda, TEL
Atomic Layer Etch Modeling for Advanced Patterning
Peter Ventzek, TEL
Advanced Dielectric Etch Technology for 14nm and Beyond
Tom Ni, AMEC
Resist Strip Technology for Advanced Technology Nodes
Ma Shawming, Senior Director, Mattson
Ced Selective Dry Etching of Silicon Based Materials and Cobalt
Dr. Jun Lin, TEL
Thin Film Process Technologies for Continued Scaling
Robert Clark, TEL
Topographically-Selective Atomic Layer Deposition on 3D Nanostructures
Woo Hee Kim, Prof., Chonbuk National university
Toward chemoresistive sensor array based on two-dimensional materials
Ho Won Jang, Prof., Seoul National University
Implantable Optoelectronic Devices for Deep-Brain Neural Modulation and Sensing
Xing Sheng, Prof., Tsinghua University
The development of micro-machined based electrochemical seismic sensors
Junbo Wang, Prof., Institute of Electronics, Chinese Academy of Sciences
MEMS Sensors for Oceanic Applications
Chenyang Xue, Prof., North University of China
IC-compatible Si-based RF MEMS resonator devices for wireless communication
Jinling Yang, Prof., Institute of Semiconductors, CAS
Research Achievements of Key Technologies in 3D Integration and Heterogeneous Integration
Kuan-Neng Chen, Prof., National Chiao Tung University
Synthesizing Large-area Two-Dimensional Molybdenum Ditelluride by Physical Vapor Deposition and Solid-phase Crystallization
Tuo-Hung Hou, Prof., National Chiao Tung University
All-silicon Micro-Fabricated High-Temperature High-Pressure Sensor
Man WONG, Prof., The Hong Kong University of Science and Technology

CSTIC 2018 Agenda

Keynote & Invited Speakers


Contact Us

Kelly Zhang, SEMI China
Tel: 86.21.6027.8556
Fax: 86.21.6027.8511
Email:
 kzhang@semi.org