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Symposium V: CMP Wafer Substrate Polishing and Post-Polish Cleaning


Symposium Committee

Dr. Kuochun Wu
Chair

Cabot Microelectronics, Asia

Dr. Paul-Chang Lin
Co-Chair

SMIC, China

Dr. Yuchun Wang
Member

Anji Microelectronics, China

Dr. David Huang
Member

Pall Inc., USA

Dr. Mahadevaiyer KRISHNAN
Member

IBM, USA

Dr. Jin-Goo Park
Member

Hanyang University, Korea

Dr. Kailiang Zhang
Member

Tanjin University of Science & Technology, China

Dr. XinChun Lu
Member

Tsinghua University , China

Mr. Kent Liu
Member

UMC Taiwan

Symposium V: CMP Wafer Substrate Polishing and Post-Polish Cleaning

  • CMP Manufacturing Process, Equipment and Materials Challenges
    -          Defect reduction: Micro-scratch, dishing, erosion and defects
    -          Defect inspection: In-line or off-line defect monitoring
    -          Process integration: Low K / Cu, high K / metal gate and others
    -          Process control: End-point detection using optical, eddy current, shear force, motor current and other methods
    -          Post-cleaning: Equipment, processes and chemistries
    -          Equipment: Productivity and process flexibility and low shear force polishing
    -          Consumables: Slurry, pad, conditioning disc, retaining ring, brush rollers and others

  • Silicon Substrate Wafer Processing for Semiconductor and Solar Applications
    -          Wafer dicing and silicon ingot processing
    -          Equipment and consumables for lapping processes
    -          Double-sided polishing and surface mini-topography control
    -          Defect reduction and substrate quality control
    -          SOI and new wafer processing technologies

  • New Polishing and Cleaning Technologies
    -          Phase change materials, HOT CMP, MEMS and polymer polishing
    -          Sapphire substrate and device wafer lapping/polishing for LED applications
    -          Equipment, processes and consumables

  • Modeling, Simulation and Fundamental Characterization of CMP
    -          Pattern density, dummy feature and CMP design rules
    -          Tribology, process physics and chemistry, wafer-slurry-pad interactions

 

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