Dr. Jianhua Ju
HFC Semiconductor

2001, Dr. Ju joined SMIC (SH) TD and focused on 0.18um/0.13um low-power core/IO device development. 2006, Dr. Ju Joined SMIC (BJ) TD as device manager focused on 65/55nm platforms device development. 2010 as deputy director focused on 40nm platform device development in SMIC (SH). Since 2015, as director, He leaded Device, SRAM, TCAD, Reliability and Model teams focused on 14/12nm FinFET platform devices development. 2019, Dr. Ju leaded DRC, LVS, PEX and Pcell/PDK team completed 14nm, N+1 and N+2 PDK and 3D PEX golden flow setup.

Dr. Jianhua Ju received his Ph. D degree (2001) in Microelectronics and Solid Electronics from Shanghai Institute of Physics and Technology, Academy of China.

Dr. Ju holds 30 US and Chinese patents, and has authored or co-authored over 40 technical papers, published in refereed journals.